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Disambiguation of "Das, Koushik K."

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New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology.

, , , , and . ISLPED, page 168-171. ACM, (2003)

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Koushik Biswas

Koushik Chakrabarty

Romy Das

Bio-economic modeling of soil resource conservation in Mid Hill Region of Nepal. Uni Gießen, (2009)

Arabindo Das

Anita Das

 

Other publications of authors with the same name

Yield estimation of SRAM circuits using "Virtual SRAM Fab"., , , , , , , , , and 2 other author(s). ICCAD, page 631-636. ACM, (2009)Nanoscale CMOS circuit leakage power reduction by double-gate device., , , and . ISLPED, page 102-107. ACM, (2004)Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS., and . ISVLSI, page 29-34. IEEE Computer Society, (2003)Security, Compliance, and Agile Deployment of Personal Identifiable Information Solutions on a Public Cloud., , , , , , and . CLOUD, page 359-366. IEEE Computer Society, (2016)High Performance MTCMOS Technique for Leakage Reduction in Hybrid SOI-Epitaxial Technologies with Enhanced-Mobility PFET Header., , and . VLSI Design, page 758-761. IEEE Computer Society, (2006)Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology., and . VLSI Design, page 291-296. IEEE Computer Society, (2003)New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology., , , , and . ISLPED, page 168-171. ACM, (2003)Reducing parasitic BJT effects in partially depleted SOI digital logic circuits., , and . Microelectron. J., 39 (2): 275-285 (2008)New digital circuit techniques for total standby leakage reduction in nano-scale SOI technology., , , , and . ESSCIRC, page 309-312. IEEE, (2003)