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Design methodology for FPGA implementation of lattice piecewise-affine functions., , и . FPT, стр. 1-4. IEEE, (2011)ASIC-in-the-loop methodology for verification of piecewise affine controllers., , , , , и . ICECS, стр. 388-391. IEEE, (2012)CMOS digital design of a trusted virtual sensor., , , и . NORCAS, стр. 1-5. IEEE, (2017)Programmable ASICs for model predictive control., , , , и . ICIT, стр. 1593-1598. IEEE, (2015)Attestation Waves: Platform Trust via Remote Power Analysis., , , , и . CANS, том 13099 из Lecture Notes in Computer Science, стр. 460-482. Springer, (2021)Cryptographic Security Through a Hardware Root of Trust., , , , , , , , , и 4 other автор(ы). ARC, том 14553 из Lecture Notes in Computer Science, стр. 106-119. Springer, (2024)Dedicated hardware IP module for extracting singular points from fingerprints., , , и . ICECS, стр. 534-537. IEEE, (2014)Accelerating the Development of NTRU Algorithm on Embedded Systems., , , и . DCIS, стр. 1-6. IEEE, (2020)Dedicated hardware IP module for fingerprint recognition., , , и . ISCE, стр. 1-2. IEEE, (2015)A complete SHA-3 hardware library based on a high efficiency Keccak design., , , и . NorCAS, стр. 1-7. IEEE, (2023)