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Disambiguation of "Mak, Wai-Kei"

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Self-aligned double patterning-aware detailed routing with double via insertion and via manufacturability consideration.

, , and . DAC, page 42:1-42:6. ACM, (2016)

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Ellen Mak

Rebecca Mak

Kwok Mak

Kei Yoshimoto

Kei Ishii

 

Other publications of authors with the same name

Double patterning-aware detailed routing with mask usage balancing., , and . ISQED, page 219-223. IEEE, (2014)Min-cut partitioning with functional replication for technology mapped circuits using minimum area overhead.. ISPD, page 100-105. ACM, (2001)A multi-technology-process reticle floorplanner and wafer dicing planner for multi-project wafers., and . ASP-DAC, page 777-782. IEEE, (2006)Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (11): 1822-1835 (2015)A fast hypergraph min-cut algorithm for circuit partitioning., and . Integr., 30 (1): 1-11 (2000)Voltage Island Generation under Performance Requirement for SoC Designs., and . ASP-DAC, page 798-803. IEEE Computer Society, (2007)Performance-Driven Board-Level Routing for FPGA-Based Logic Emulation (Abstract)., and . FPGA, page 260. ACM, (1998)A Bounding Box-based Net Partitioning Method for Double-sided Routing., , , and . ACM Great Lakes Symposium on VLSI, page 397-402. ACM, (2024)Temporal logic replication for dynamically reconfigurable FPGA partitioning., and . ISPD, page 190-195. ACM, (2002)Pin Assignment Optimization for Multi-2.5D FPGA-Based Systems With Time-Multiplexed I/Os., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (3): 494-506 (2021)