( en | de | ru )

 

Disambiguation of "Patel, Janak H."

Author of the publication

copydeleteadd this publication to your clipboard
The evolution of dependable computing at the University of Illinois.

, , , and . IFIP Congress Topical Sessions, volume 156 of IFIP, page 135-164. Kluwer/Springer, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Janak Prasad

Angel Janakieff

Wassil Janakiew

Narayanan Janakiraman

Nikolai Janakiev

 

Other publications of authors with the same name

Efficient Variable Ordering Heuristics for Shared ROBDD., , and . ISCAS, page 1690-1693. IEEE, (1993)Partial Scan Design Based on Circuit State Information., , , and . DAC, page 807-812. ACM Press, (1996)Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists., , , , , and . DAC, page 133-138. ACM Press, (1995)APT: An Area-Performance-Testability Driven Placement Algorithm., , , and . DAC, page 141-146. IEEE Computer Society Press, (1992)Sequential Circuit Test Generation in a Genetic Algorithm Framework., , , and . DAC, page 698-704. ACM Press, (1994)Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator., , and . DAC, page 535-540. IEEE Computer Society Press, (1990)Sequential circuit testability enhancement using a nonscan approach., , , and . IEEE Trans. Very Large Scale Integr. Syst., 3 (2): 333-338 (1995)Efficient testing strategies for bit- and digit-serial arrays used in digital signal processors., , , and . Digit. Signal Process., 1 (4): 231-244 (1991)New Techniques for Deterministic Test Pattern Generation., and . J. Electron. Test., 15 (1-2): 63-73 (1999)A Fast and Accurate Gate-Level Transient Fault Simulation Environment., , , , and . FTCS, page 310-319. IEEE Computer Society, (1993)