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Performance Evaluation of an On-Chip Multi-Threaded Processor with Cache Memory Managed by Logical Thread Number., , , , , , and . PDPTA, page 1775-1781. CSREA Press, (2003)Design of Multiple PVAS on InfiniBand Cluster System Consisting of Many-core and Multi-core., , , , , and . EuroMPI/ASIA, page 133. ACM, (2014)Compulsory Game based Robot Contest for Embedded System Development Education., , , , , , , and . ICSCA, page 259-263. ACM, (2018)Improving Parallel I/O Performance Using Multithreaded Two-Phase I/O with Processor Affinity Management., , , , , and . PPAM (1), volume 8384 of Lecture Notes in Computer Science, page 714-723. Springer, (2013)Multidisciplinary skill assessment for embedded software development education via a robot contest., , , , , , , and . ICSE (Companion Volume), page 151-152. ACM, (2018)Acceleration of genetic algorithms for sudoku solution on many-core processors., , and . GECCO (Companion), page 407-414. ACM, (2011)Proposal of a multi-core processor architecture for effective evolutionary computation., , and . GECCO, page 1321-1322. ACM, (2010)APRIS Robot Challenge: Collaborative Online Interdisciplinary and International Learning for IoT/Robotics Systems., , , , , , , , and . EDUCON, page 1-8. IEEE, (2024)Distributed NSGA-II with migration using compensation on many-core processors for improving performance and accuracy., , and . GECCO (Companion), page 161-162. ACM, (2017)Fault-tolerance of distributed genetic algorithms on many-core processors., and . GECCO (Companion), page 1749-1750. ACM, (2013)