Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications., , , , , , and . ISSCC, page 94-95. IEEE, (2009)40-Gb/s circuits built from a 120-GHz fT SiGe technology., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 37 (9): 1106-1114 (2002)A 56.1Gb/s NRZ modulated 850nm VCSEL-based optical link., , , , , , , , , and 4 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)Monolithically integrated silicon nanophotonics receiver in 90nm CMOS technology node., , , , , , , , , and 4 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)High speed circuits for short reach optical communications.. OFC, page 1-34. IEEE, (2015)Deeply-scaled CMOS-integrated nanophotonic devices for next generation supercomputers., , , , , and . ACM Great Lakes Symposium on VLSI, page 475-476. ACM, (2011)A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelength., , , , , and . IEEE J. Solid State Circuits, 58 (8): 2202-2213 (2023)A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter., , , , , , , , , and 8 other author(s). ISSCC, page 484-486. IEEE, (2019)A Wide Power-Supply Range (0.5V-to-1.3V) Wide Tuning Range (500 MHz-to-8 GHz) All-Static CMOS AD PLL in 65nm SOI., , , , and . ISSCC, page 172-173. IEEE, (2007)30Gbps optical link utilizing heterogeneously integrated III-V/Si photonics and CMOS circuits., , , , , , , , , and 3 other author(s). OFC, page 1-3. IEEE, (2014)