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Disambiguation of "Umuroglu, Yaman"

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LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications.

, , , and . FPL, page 291-297. IEEE, (2020)

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Sibel Yaman

Sabahattin Yaman

Hakan Yaman

Kemal Yaman

Melek Yaman

 

Other publications of authors with the same name

BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing., , and . FPL, page 307-314. IEEE Computer Society, (2018)LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications., , , and . FPL, page 291-297. IEEE, (2020)Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark., , , , , , , , , and 8 other author(s). CoRR, (2022)Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing., , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (3): 15:1-15:24 (2019)EcoFlow: Efficient Convolutional Dataflows on Low-Power Neural Network Accelerators., , , , , , , and . IEEE Trans. Computers, 73 (9): 2275-2289 (September 2024)An energy efficient column-major backend for FPGA SpMV accelerators., and . ICCD, page 432-439. IEEE Computer Society, (2014)Towards efficient quantized neural network inference on mobile devices: work-in-progress., and . CASES, page 18:1-18:2. ACM, (2017)Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform., , and . FPL, page 1-8. IEEE, (2015)QONNX: Representing Arbitrary-Precision Quantized Neural Networks., , , , , , , , , and 4 other author(s). CoRR, (2022)High-Throughput DNN Inference with LogicNets., , , and . FCCM, page 238. IEEE, (2020)