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Disambiguation of "Boemo, Eduardo I."

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A Framework to Compare Estimated and Measured Power Consumption on FPGAs.

, , and . J. Low Power Electron., 15 (4): 329-337 (2019)

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Nata i i

Eduardo Portabella

Eduardo Ospina

Eduardo Klein

Eduardo Maurô

 

Other publications of authors with the same name

Power Aware Dividers in FPGA., , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 574-584. Springer, (2004)A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation., , , , and . ICECS, page 241-244. IEEE, (1999)Statistical Power Estimation for FPGA., , , and . FPL, page 515-518. IEEE, (2005)Rapid prototyping of a self-timed ALU with FPGAs., , , and . ReConFig, IEEE Computer Society, (2005)A-B Nodes Classification for Power Estimation., and . FPL, page 1-6. IEEE, (2006)Design and FPGA implementation of digit-serial FIR filters., , , and . ICECS, page 191-194. IEEE, (1998)FSM Decomposition for Low Power in FPGA., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 350-359. Springer, (2002)Fast FPGA-based pipelined digit-serial/parallel multipliers., , , and . ISCAS (1), page 482-485. IEEE, (1999)A Framework to Compare Estimated and Measured Power Consumption on FPGAs., , and . J. Low Power Electron., 15 (4): 329-337 (2019)Some Notes on Power Management on FPGA-Based Systems., , , and . FPL, volume 975 of Lecture Notes in Computer Science, page 149-157. Springer, (1995)