Author of the publication

An empirical model for accurate estimation of routing delay in FPGAs.

, and . ICCAD, page 328-331. IEEE Computer Society / ACM, (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Microprocessor system applications and challenges for through-silicon-via-based three-dimensional integration., , and . IET Comput. Digit. Tech., 5 (3): 205-212 (2011)F5: Frequency generation and clock distribution., , , , , , , and . ISSCC, page 508-509. IEEE, (2013)Logic soft errors in sub-65nm technologies design and CAD challenges., , , and . DAC, page 2-4. ACM, (2005)3DICs for tera-scale computing: a case study., , and . ISPD, page 77-78. ACM, (2011)Innovations for Intelligent Edge., , , , and . ESSCIRC, page 41-44. IEEE, (2022)Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops., , , , , , , , , and 1 other author(s). IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (3): 208-217 (2011)CPU Microarchitectural Performance Analysis of SVT-AV1 Encoder., , , and . ICIP, page 3045-3049. IEEE, (2023)A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding., , , , , , , , and . DATE, page 1400-1403. IEEE, (2021)High-frequency DC-DC conversion : fact or fiction., , , , and . ISCAS, IEEE, (2006)A 22nm dynamically adaptive clock distribution for voltage droop tolerance., , , , and . VLSIC, page 94-95. IEEE, (2012)