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Transe: an experimental design tool., , and . Algorithms and Parallel VLSI Architectures, page 299-304. Elsevier, (1991)Schedulability analysis for mixed critical cyber physical systems., , , , , and . ICPS, page 297-303. IEEE, (2018)Helping the Automated Validation Process of User Interfaces Systems., , , and . ICSE, page 219-228. IEEE Computer Society, (1998)Transe: An Experimental Transformation Assistant for Digital Circuit Design., , and . Designing Correct Circuits, volume A-5 of IFIP Transactions, page 103-118. North-Holland, (1992)Deriving a Formal Model of an Interactive System from its UIL Description in order to Verify and Test its Behaviour., , and . DSV-IS, page 105-122. Springer, (1996)Mechanisms for Efficient Multiprocessor Combinator Reduction., , , , and . LISP and Functional Programming, page 113-121. ACM, (1986)Formal proof and test case generation for critical embedded systems using SCADE., , , and . IFIP Congress Topical Sessions, volume 156 of IFIP, page 499-504. Kluwer/Springer, (2004)Towards a multi-formalism framework for architectural synthesis: the ASAR project., , , , , , , , , and 4 other author(s). CODES, page 25-32. IEEE Computer Society, (1994)MaRS, a Combinator Graph Reduction Multiprocessor., , , , , , , and . PARLE (1), volume 365 of Lecture Notes in Computer Science, page 176-192. Springer, (1989)LETO - A Lustre-Based Test Oracle for Airbus Critical Systems., , and . FMICS, volume 5596 of Lecture Notes in Computer Science, page 7-22. Springer, (2008)