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An 0.08 e-. pJ/step 14-bit gain-adaptive single-slope column ADC with enhanced HDR function for high-quality imagers.

, , , , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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7.6 A High-Speed Back-Illuminated Stacked CMOS Image Sensor with Column-Parallel kT/C-Cancelling S&H and Delta-Sigma ADC., , , , , , , , , and 6 other author(s). ISSCC, page 116-118. IEEE, (2021)An 0.08 e-. pJ/step 14-bit gain-adaptive single-slope column ADC with enhanced HDR function for high-quality imagers., , , , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag., , and . ICCD, page 342-350. IEEE Computer Society, (2005)SEVA: A Soft-Error- and Variation-Aware Cache Architecture., , and . PRDC, page 47-54. IEEE Computer Society, (2006)Dynamic Estimation of Task Level Parallelism with Operating System Support., and . ISPAN, page 358-363. IEEE Computer Society, (2005)Cloudification and Autoscaling Orchestration for Container-Based Mobile Networks toward 5G: Experimentation, Challenges and Perspectives., , , and . VTC Spring, page 1-7. IEEE, (2018)Compiler-Assisted Thread Level Control Speculation., , , , , , and . Euro-Par, volume 2790 of Lecture Notes in Computer Science, page 603-608. Springer, (2003)An 8.3M-pixel 480fps global-shutter CMOS image sensor with gain-adaptive column ADCs and 2-on-1 stacked device structure., , , , , , , , , and 5 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)Traffic Monitoring in Software Defined Networks Using Opendaylight Controller., , and . MSPN, volume 10026 of Lecture Notes in Computer Science, page 38-48. Springer, (2016)Utilization of SECDED for soft error and variation-induced defect tolerance in caches., , , and . DATE, page 1134-1139. EDA Consortium, San Jose, CA, USA, (2007)