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Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era.

, , , and . IEEE Micro, 37 (4): 10-18 (2017)

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Experiments with HPS, a Restricted Data Flow Microarchitecture for High Performance Computers., , , , , and . COMPCON, page 254-258. IEEE Computer Society, (1986)Algorithm and Data Optimization Techniques for Scaling to Massively Threaded Systems., , , , , , , and . Computer, 45 (8): 26-32 (2012)TrIMS: Transparent and Isolated Model Sharing for Low Latency Deep LearningInference in Function as a Service Environments., , , , and . CoRR, (2018)Accelerating Reduction and Scan Using Tensor Core Units., , , , and . CoRR, (2018)MLModelScope: Evaluate and Measure ML Models within AI Pipelines., , , , and . CoRR, (2018)Profile-Guided Automatic Inline Expansion for C Programs, , , and . Soft\-ware--Prac\-tice and Experience, 22 (5): 349--369 (May 1992)Improving Static Branch Prediction in a Compiler., , and . IEEE PACT, page 214-221. IEEE Computer Society, (1998)Parallelizing Maximal Clique Enumeration on GPUs., , , , , and . PACT, page 162-175. IEEE, (2023)Accelerating iterative field-compensated MR image reconstruction on GPUS., , , , , and . ISBI, page 820-823. IEEE, (2010)"Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense., , and . MICRO, page 319-330. IEEE Computer Society, (2005)