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Federated Big Data for Resource Aggregation and Load Balancing with DIRAC., , and . ICCS, volume 51 of Procedia Computer Science, page 2769-2773. Elsevier, (2015)Formal Support for Untimed SystemC Specifications: Application to High-level Synthesis., , and . FDL, page 74-79. ECSI, Electronic Chips & Systems design Initiative, (2010)An Efficient NB-LDPC Decoder Architecture for Space Telecommand Links., , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (4): 1213-1217 (2021)Single Source Design Environment for Embedded Systems Based on SystemC., , , , , and . Des. Autom. Embed. Syst., 9 (4): 293-312 (2004)SystemC-MDVP modelling of pressure driven microfluidic systems., , , , and . MECO, page 10-13. IEEE, (2014)Hardware Aware eIRA LDPC Code Generation., and . ISWCS, page 438-441. IEEE, (2005)UML-Based Design Flow for Systems with Neural Networks., , and . DCIS, page 1-6. IEEE, (2023)OpenMP Dynamic Device Offloading in Heterogeneous Platforms., , , and . IWOMP, volume 11718 of Lecture Notes in Computer Science, page 109-122. Springer, (2019)Pre-Silicon FEC Decoding Verification on SoC FPGAs., , , , and . IEEE Commun. Lett., 25 (1): 127-131 (2021)Partial Scan High-Level Synthesis., and . ED&TC, page 481-485. IEEE Computer Society, (1996)