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Disambiguation of "Craninckx, Jan"

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SAW-less software-defined radio transceivers in 40nm CMOS.

, , and . CICC, page 1-8. IEEE, (2011)

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Tsai-Yu Jansen

Einfluss der Konversion laparoskopischer Operationen auf Tumorwachstum, hepatische Metastasierung und Tumorangiogenese. Uni Heidelberg, (2010)

Dirk Jansen

Temperaturkorrektur von mit dem Falling-Weight-Deflectometer gemessenen Deflexionen auf Asphaltbefestigungen. Uni Duisburg-Essen, (2009)

Christoph Janello

Wertschöpfung im digitalisierten Buchmarkt. Uni München, (2010)

Richard Janissen

Biomolecular based nano-manipulation with a combined atomic force microscope and single molecule fluorescence setup. Uni Düsseldorf, (2009)

Matthäus Janczyk

Synthese funktionalisierter Trinukleotide und ihre Anwendung bei der Randomisierung. Uni Greifswald, (2009)
 

Other publications of authors with the same name

Clock synthesis design.. ISSCC, page 510. IEEE, (2009)A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers., , , , , , and . ISSCC, page 62-64. IEEE, (2011)A multiband LTE SAW-less modulator with -160dBc/Hz RX-band noise in 40nm LP CMOS., , , , , and . ISSCC, page 374-376. IEEE, (2011)An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power., , , , and . ESSCIRC, page 176-179. IEEE, (2015)Session 18 overview: Full duplex wireless front-ends., , and . ISSCC, page 312-313. IEEE, (2017)New Associate Editor.. IEEE J. Solid State Circuits, 53 (5): 1243 (2018)New Associate Editor.. IEEE J. Solid State Circuits, 52 (9): 2223 (2017)A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors., and . IEEE J. Solid State Circuits, 32 (5): 736-744 (1997)A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers., , , , and . IEEE J. Solid State Circuits, 54 (3): 646-658 (2019)A 70MHz Bandwidth Time-Interleaved Noise-Shaping SAR Assisted Delta Sigma ADC with Digital Cross-Coupling in 28nm CMOS., , , , and . ESSCIRC, page 389-392. IEEE, (2023)