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A coprocessor for clock-mapping-based nearest Euclidean distance search with feature vector dimension adaptability.

F. An, T. Akazawa, S. Yamazaki, L. Chen, and H. Mattausch. CICC, page 1-4. IEEE, (2014)

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Fengwei Wang

Fengwei Guo

Fengwei Li

An Mengi

An You

Other publications of authors with the same name

A K-Means-Based Multi-Prototype High-Speed Learning System with FPGA-Implemented Coprocessor for 1-NN Searching.F. An, T. Koide, and H. Mattausch. IEICE Trans. Inf. Syst., 95-D (9): 2327-2338 (2012)Dynamically reconfigurable system for LVQ-based on-chip learning and recognition.F. An, X. Zhang, L. Chen, and H. Mattausch. ISCAS, page 1338-1341. IEEE, (2016)A SoPC architecture for nearest-neighbor based learning and recognition.F. An, L. Chen, and H. Mattausch. ISPACS, page 147-152. IEEE, (2014)Efficient VLSI Architecture for Edge Sensing Anti-Aliasing Demosaicing.Y. Zhang, Z. Peng, R. Yao, H. Deng, W. Zhang, L. Chen, and F. An. ICTA, page 105-106. IEEE, (2021)An Energy-Efficient, Resource-Efficient and High Frame-Rate End-to-End Pedestrian Detector Using HOG-SVM for Intelligent Edge Devices.J. Wang, J. Song, B. Liu, Z. Shen, Y. Jiang, F. An, C. Wang, and J. Tang. IECON, page 1-6. IEEE, (2023)A Dynamic JPEG CODEC with Adaptive Quantization Table for Frame Storage Compression.Y. Ouyang, X. Wang, G. Shi, L. Chen, and F. An. APCCAS, page 119-122. IEEE, (2022)Object-recognition VLSI for pedestrian detection in automotive applications.F. An, X. Zhang, L. Chen, and I. Ishii. ASICON, page 651-653. IEEE, (2017)FPGA-based object detection processor with HOG feature and SVM classifier.F. An, P. Xu, Z. Xiao, and C. Wang. SoCC, page 187-190. IEEE, (2019)LVQ neural network SoC adaptable to different on-chip learning and recognition applications.F. An, T. Akazawa, S. Yamazaki, L. Chen, and H. Mattausch. APCCAS, page 623-626. IEEE, (2014)Asynchronous Double-Frame-Exposure Binocular-Camera With Pixel-Level Pipeline Architecture for High-Speed Motion Tracking.R. Yao, H. Deng, W. Zhang, L. Chen, and F. An. IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2967-2971 (2022)

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Disambiguation of "An, Fengwei"

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A coprocessor for clock-mapping-based nearest Euclidean distance search with feature vector dimension adaptability.

Please choose a person to relate this publication to

Fengwei Wang

Fengwei Guo

Fengwei Li

An Mengi

An You

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "An, Fengwei"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A coprocessor for clock-mapping-based nearest Euclidean distance search with feature vector dimension adaptability.

Please choose a person to relate this publication to

Fengwei Wang

Fengwei Guo

Fengwei Li

An Mengi

An You

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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A coprocessor for clock-mapping-based nearest Euclidean distance search with feature vector dimension adaptability.