( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Dual-Sum Single-Carry Self-Timed Adder Designs.

, и . ISVLSI, стр. 121-126. IEEE Computer Society, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Padmanabhan Balasubramanian

Balasubramanian Ramani

Muthuswami Balasubramanian

Subramaniaiyeaiyer Balasubramanian

Bharat Balasubramanian

 

Другие публикации лиц с тем же именем

An enhanced sentiment dictionary for domain adaptation with multi-domain dataset in Tamil language (ESD-DA)., , и . Soft Comput., 25 (5): 3697-3711 (2021)Approximate quasi-delay-insensitive asynchronous adders: Design and analysis., , и . MWSCAS, стр. 1196-1199. IEEE, (2017)Hardware Efficient Approximate Adder Design., и . TENCON, стр. 806-810. IEEE, (2018)Comments on "Dual-rail asynchronous logic multi-level implementation".. CoRR, (2018)A study on the impact of macroeconomic factors on S&P BSE Bankex returns., и . ICACCI, стр. 2614-2618. IEEE, (2016)Indicating Asynchronous Array Multipliers., и . CoRR, (2019)Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications., , и . EECS, стр. 37-44. IEEE, (2019)Self-timed full adder designs based on hybrid input encoding., , и . DDECS, стр. 56-61. IEEE Computer Society, (2009)A New Design Technique for Weakly Indicating Function Blocks., и . DDECS, стр. 116-121. IEEE Computer Society, (2008)Theoretical Estimation of the Microalgal Potential for Biofuel Production and Carbon Dioxide Sequestration in India., , , и . SocProS (1), том 816 из Advances in Intelligent Systems and Computing, стр. 775-790. Springer, (2017)