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Disambiguation of "Chakraborty, Indranil"

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Pruning for Improved ADC Efficiency in Crossbar-based Analog In-memory Accelerators.

, , , and . CoRR, (2024)

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Indranil Roy

Indranil Chatterjee

Indranil Chatterjee

Indranil Ganguli

Sourav Chakraborty

 

Other publications of authors with the same name

Bundle and separate sales in auctions with entry.. Games Econ. Behav., 54 (1): 31-46 (2006)Design Space and Memory Technology Co-Exploration for In-Memory Computing Based Machine Learning Accelerators., , , and . ICCAD, page 91:1-91:9. ACM, (2022)NAX: Co-Designing Neural Network and Hardware Architecture for Memristive Xbar based Computing Systems., , , and . CoRR, (2021)A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding., , , , , , , , and . DATE, page 1400-1403. IEEE, (2021)On Noise Stability and Robustness of Adversarially Trained Networks on NVM Crossbars., , , and . IEEE Trans. Very Large Scale Integr. Syst., 30 (10): 1448-1460 (2022)On Robustness of Spin-Orbit-Torque Based Stochastic Sigmoid Neurons for Spiking Neural Networks., , , , and . IJCNN, page 1-6. IEEE, (2019)IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (8): 2521-2531 (2020)Discretization Based Solutions for Secure Machine Learning Against Adversarial Attacks., , and . IEEE Access, (2019)Scaling Deep Spiking Neural Networks with Binary Stochastic Activations., , and . ICCC, page 50-58. IEEE, (2019)Circuits and Architectures for In-Memory Computing-Based Machine Learning Accelerators., , , , and . IEEE Micro, 40 (6): 8-22 (2020)