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Understanding voltage variations in chip multiprocessors using a distributed power-delivery network., , , , and . DATE, page 624-629. EDA Consortium, San Jose, CA, USA, (2007)Power management of multi-core chips: Challenges and pitfalls., , , , , , , , , and 1 other author(s). DATE, page 977-982. IEEE, (2012)Towards a software approach to mitigate voltage emergencies., , , , and . ISLPED, page 123-128. ACM, (2007)GPUVolt: modeling and characterizing voltage noise in GPU architectures., , , , and . ISLPED, page 141-146. ACM, (2014)System level analysis of fast, per-core DVFS using on-chip switching regulators., , , and . HPCA, page 123-134. IEEE Computer Society, (2008)Performance Implications of Periodic Checkpointing on Large-Scale Cluster Systems., , , and . IPDPS, IEEE Computer Society, (2005)Understanding Soft Error Resiliency of Blue Gene/Q Compute Chip through Hardware Proton Irradiation and Software Fault Injection., , , and . SC, page 587-596. IEEE Computer Society, (2014)Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack., , , , , and . DAC, page 788-793. ACM, (2009)DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors., , , , and . HPCA, page 381-392. IEEE Computer Society, (2008)An event-guided approach to reducing voltage noise in processors., , , , and . DATE, page 160-165. IEEE, (2009)