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A High-Speed Low-Complexity VLSI SISO Architecture., , , , and . APCCAS, page 1512-1515. IEEE, (2006)Implementation-aware selection of the custom instruction set for extensible processors., , , , , and . Microprocess. Microsystems, 38 (7): 681-691 (2014)Low-power data-driven dynamic logic (D3L) CMOS devices., , and . ISCAS, page 752-755. IEEE, (2000)Deep out-of-band radiation reduction by using joint filterbank and cancellation carriers in cognitive radios., , , and . IST, page 271-276. IEEE, (2012)SOPC-Based Architecture for Discrete Particle Swarm Optimization., , and . ICECS, page 1003-1006. IEEE, (2007)Simulation of Voice Processing Applications through VLIW DSP Architectures., , , , and . ICECS, page 291-293. IEEE, (2007)Defuzzification block: New algorithms, and efficient hardware and software implementation issues., , , , and . Eng. Appl. Artif. Intell., 26 (1): 162-172 (2013)Energy-aware design space exploration of registerfile for extensible processors., , , , and . ICSAMOS, page 273-281. IEEE, (2010)Architecture-Level Design Space Exploration of Super Scalar Microarchitecture for Network Applications., , and . DSD, page 269-272. IEEE Computer Society, (2010)Design of a Custom Packet Switching Engine for Network Applications., , , and . CSICC, volume 6 of Communications in Computer and Information Science, page 790-794. (2008)