Author of the publication

Design and Evaluation of a Hardware on-line Program-Flow Checker for Embedded Microcontrollers.

, , , and . DFT, page 371-379. IEEE Computer Society, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Dependable Multicore Architectures at Nanoscale: The View From Europe., , , , , , , , , and 4 other author(s). IEEE Des. Test, 32 (2): 17-28 (2015)DEMO: top-k cardinality estimation with HyperLogLog sketches., , , , and . ICIN, page 83-85. IEEE, (2021)Demo: Implementing advanced network functions with stateful programmable data planes., , , , , and . LANMAN, page 1-2. IEEE, (2017)Design of a Self Checking Reed Solomon Encoder., , , and . IOLTS, page 201-202. IEEE Computer Society, (2005)Design of a QCA Memory with Parallel Read/Serial Write., , , , and . ISVLSI, page 292-294. IEEE Computer Society, (2005)Bit Flip Injection in Processor-Based Architectures: A Case Study., , , , , and . IOLTW, page 117-. IEEE Computer Society, (2002)Feedback based droop mitigation., , , and . DATE, page 879-882. IEEE, (2011)Error detection in ternary CAMs using bloom filters., , , and . DATE, page 1474-1479. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Error Detection in Signed Digit Arithmetic Circuit with Parity Checker., , , , and . DFT, page 401-408. IEEE Computer Society, (2003)FPGA oriented design of parity sharing RS codecs., , , and . DFT, page 259-265. IEEE Computer Society, (2005)