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Development of PVM Code for a Low Latency Switch Based Interconnect.

, , and . PVM, volume 1156 of Lecture Notes in Computer Science, page 229-234. Springer, (1996)

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Performance Assessment of Large ATM Switching Networks with Parallel Simulation Tool., , and . ICPP (3), page 142-145. CRC Press, (1995)Simulation of ATM Exchanges on a Parallel Computer., , and . HPCN Europe, volume 1067 of Lecture Notes in Computer Science, page 921-922. Springer, (1996)A Design Methodology to Generate Dynamically Self-Reconfigurable SoCs for Virtex-II Pro FPGAs., , and . FPT, page 325-326. IEEE, (2005)Adaptive load balancing of parallel applications with multi-agent reinforcement learning on heterogeneous systems., , , , , and . Sci. Program., 12 (2): 71-79 (2004)Development of PVM Code for a Low Latency Switch Based Interconnect., , and . PVM, volume 1156 of Lecture Notes in Computer Science, page 229-234. Springer, (1996)Scalable Run Time Reconfigurable Architecture., , and . VLSI, volume 162 of IFIP Conference Proceedings, page 113-124. Kluwer, (1999)Case Study: Implementation of a Virtual Instrument on a Dynamically Reconfigurable Platform., , , and . ARC, volume 3985 of Lecture Notes in Computer Science, page 12-17. Springer, (2006)Simulation of ATM Switches Using Dynamically Reconfigurable FPGAs., , and . FPL, volume 1482 of Lecture Notes in Computer Science, page 461-465. Springer, (1998)Reconfigurable Programming in the Large on Extendable Uniform Reconfigurable Computing Array's: An Integrated Approach Based on Reconfigurable Virtual Architectures., , and . FPL, volume 1673 of Lecture Notes in Computer Science, page 469-474. Springer, (1999)Exploiting Symmetry for Partitioning Models in Parallel Discrete Event Simulation., , , and . PADS, page 189-194. IEEE Computer Society, (2004)