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Compiler-guided leakage optimization for banked scratch-pad memories.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (10): 1136-1146 (2005)

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Compilation for Distributed Memory Architectures., and . The Compiler Design Handbook, CRC Press, (2002)TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability., , and . Conf. Computing Frontiers, page 16:1-16:8. ACM, (2015)Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression., , and . CODES+ISSS, page 87-92. ACM, (2005)Taking Garbage Collection Overheads Off the Critical Path in SSDs., , and . Middleware, volume 7662 of Lecture Notes in Computer Science, page 164-186. Springer, (2012)Hybrid Techniques for Fast Multicore Simulation., , and . Euro-Par, volume 5704 of Lecture Notes in Computer Science, page 122-134. Springer, (2009)An ilp based approach to reducing energy consumption in nocbased CMPS., , and . ISLPED, page 411-414. ACM, (2007)Application mapping for chip multiprocessors., , , and . DAC, page 620-625. ACM, (2008)An evaluation of code and data optimizations in the context of disk power reduction., , and . ISLPED, page 209-214. ACM, (2005)Cashing in on hints for better prefetching and caching in PVFS and MPI-IO., , , , and . HPDC, page 191-202. ACM, (2010)FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads., , and . HPCA, page 426-439. IEEE, (2019)