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WBT-2000: workshop on binary translation - 2000., and . SIGARCH Comput. Archit. News, 29 (1): 23-25 (2001)Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA., , , , and . SIGARCH Comput. Archit. News, 43 (4): 52-57 (2015)Analyzing power efficiency of optimization techniques and algorithm design methods for applications on heterogeneous platforms., , , , and . Int. J. High Perform. Comput. Appl., 28 (3): 319-334 (2014)MGSim + MGMark: A Framework for Multi-GPU System Research., , , , , , , , , and 3 other author(s). CoRR, (2018)Message from the Program Chairs : IISWC 2020., and . IISWC, page x-xi. IEEE, (2020)Obtaining FPGA soft error rate in high performance information systems., , , and . Microelectron. Reliab., 49 (5): 551-557 (2009)Dynamic Input Buffer Allocation (DIBA) for Fault Tolerant Ethernet Packet Switching., , and . PDPTA, page 819-823. CSREA Press, (2003)PRISM: predicting resilience of GPU applications using statistical methods., , , , and . SC, page 69:1-69:14. IEEE / ACM, (2018)Valar: a benchmark suite to study the dynamic behavior of heterogeneous systems., , , and . GPGPU@ASPLOS, page 54-65. ACM, (2013)Demystifying on-the-fly spill code., , , and . PLDI, page 180-189. ACM, (2005)