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Bandwidth Efficient Homomorphic Encrypted Matrix Vector Multiplication Accelerator on FPGA.

, , , and . FPT, page 1-9. IEEE, (2022)

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How to Avoid Zero-Spacing in Fractionally-Strided Convolution? A Hardware-Algorithm Co-Design Methodology., , , and . HiPC, page 81-90. IEEE, (2021)Bandwidth Efficient Homomorphic Encrypted Matrix Vector Multiplication Accelerator on FPGA., , , and . FPT, page 1-9. IEEE, (2022)NTTGen: a framework for generating low latency NTT implementations on FPGA., , , and . CF, page 30-39. ACM, (2022)A High Throughput Parallel Hash Table on FPGA using XOR-based Memory., , , , and . HPEC, page 1-7. IEEE, (2020)Implementation of Learning-Based Dynamic Demand Response on a Campus Micro-Grid., , , and . IJCAI, page 4250-4251. IJCAI/AAAI Press, (2016)DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference., , , and . CoRR, (2020)Spatio-Temporal Missing Data Imputation for Smart Power Grids., , , and . e-Energy, page 458-465. ACM, (2021)Parallel Totally Induced Edge Sampling on FPGAs., , , , and . PARCO, volume 36 of Advances in Parallel Computing, page 671-680. IOS Press, (2019)How to Efficiently Train Your AI Agent? Characterizing and Evaluating Deep Reinforcement Learning on Heterogeneous Platforms., , , , and . HPEC, page 1-7. IEEE, (2020)IP Cores for Graph Kernels on FPGAs., , , , and . HPEC, page 1-7. IEEE, (2019)