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Disambiguation of "Payá Vayá, G."

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CereBridge: An Efficient, FPGA-based Real-Time Processing Platform for True Mobile Brain-Computer Interfaces*

, , and . 2020 42nd Annual International Conference of the IEEE Engineering in Medicine Biology Society (EMBC), page 4046-4050. (2020)
DOI: 10.1109/EMBC44109.2020.9175623

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Prof. Dr.-Ing.  Guillermo Payá Vayá TU Braunschweig, Chair for Chip Design for Embedded Computing

Begoña Payá Herrero

Huschang Paya

Ioannis Vayas

Georges Vayatis

 

Other publications of authors with the same name

FLINT: Layout-oriented FPGA-based methodology for fault tolerant ASIC design, , , , and . 2015 Design, Automation Test in Europe Conference Exhibition (DATE), page 297-300. (March 2015)Exploring Different Approximate Adder Architecture Implementations in a 250◦ C SOI Technology, , , , and . 1st Workshop On Approximate Computing (WAPCO), HiPEAC 2015, (2015)Efficient Emulation of Floating-Point Arithmetic on Fixed-Point SIMD Processors, , and . 2016 IEEE International Workshop on Signal Processing Systems (SiPS), page 254-259. (October 2016)Design Space Exploration for Convolutional Neural Networks on a 22 nm FD-SOI SoC, , and . Embedded World Conference (ewc), (2019)KAVUAKA: A Low Power Application Specific Hearing Aid Processor, , and . 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC), page 99-104. (October 2019)Issue-Slot Based Predication Encoding Technique for VLIW Processors, , , and . 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), page 1-6. (2020)Design Space Exploration Framework for Tensilica-Based Digital Audio Processors in Hearing Aids, , , and . 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), page 1-6. (2020)Performance monitoring for automatic speech recognition in noisy multi-channel environments, , , , , and . 2016 IEEE Spoken Language Technology Workshop (SLT), page 50-56. (December 2016)FNOCEE: A framework for NoC evaluation by FPGA-based emulation, , , , and . Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on, page 86-95. (July 2015)An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processors, , and . Signal Processing Systems (SiPS), 2015 IEEE Workshop on, page 1-6. (October 2015)