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Crack me if you can: hardware acceleration bridging the gap between practical and theoretical cryptanalysis?: a Survey.

, , , and . SAMOS, page 167-172. ACM, (2018)

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FPGA implementation of high speed XTS-AES for data storage devices., , , , , and . ICITST, page 25-28. IEEE, (2011)A Hardware-Efficient Implementation of CLOC for On-chip Authenticated Encryption., , , and . ISVLSI, page 311-315. IEEE Computer Society, (2018)Context-Committing Security of Leveled Leakage-Resilient AEAD., , , , , and . IACR Trans. Symmetric Cryptol., 2024 (2): 348-370 (2024)Hardware Implementation of Masked SKINNY SBox with Application to AEAD., and . SPACE, volume 13783 of Lecture Notes in Computer Science, page 50-69. Springer, (2022)On Hardware Implementation of Tang-Maitra Boolean Functions., , , and . WAIFI, volume 11321 of Lecture Notes in Computer Science, page 111-127. Springer, (2018)Tile-based modular architecture for accelerating homomorphic function evaluation on FPGA., and . MWSCAS, page 1-4. IEEE, (2016)SoK: On DFA Vulnerabilities of Substitution-Permutation Networks., , , , , and . AsiaCCS, page 403-414. ACM, (2019)On the Cost of ASIC Hardware Crackers: A SHA-1 Case Study., , , , , and . CT-RSA, volume 12704 of Lecture Notes in Computer Science, page 657-681. Springer, (2021)New polynomial basis versatile multiplier over GF(2m) for low-power on-chip crypto-systems., and . ISCAS, page 1438-1441. IEEE, (2015)Crack me if you can: hardware acceleration bridging the gap between practical and theoretical cryptanalysis?: a Survey., , , and . SAMOS, page 167-172. ACM, (2018)