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A 0.76-pJ/Pulse 0.1-1 Gpps Microwatt IR-UWB CMOS Pulse Generator With Adaptive PSD Control Using a Limited Monocycle Precharge Technique., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (8): 806-810 (2015)Assessing and Modeling the Effect of RF Impairments on UTRA LTE Uplink Performance., , , , , and . VTC Fall, page 1213-1217. IEEE, (2007)Frequency notching applicable to CMOS implementation of WLAN compatible IR-UWB pulse generators., , , , and . ICUWB, page 36-40. IEEE, (2012)Effect of Phase Noise on Spectral Efficiency for Utra Long Term Evolution., , , , , and . PIMRC, page 1-5. IEEE, (2006)T-LINC Architecture with Digital Combination and Mismatch Correction in the Receiver., , , , , and . NORCAS, page 1-5. IEEE, (2019)Crosstalk coupling effects of CMOS co-planar spiral inductors., , and . CICC, page 371-374. IEEE, (2004)In-Band Interference Effects on UTRA LTE Uplink Resource Block Allocation., , and . VTC Spring, page 1846-1850. IEEE, (2008)On wafer X-parameter based modeling of a switching cascode power amplifier., , , , and . NORCHIP, page 1-4. IEEE, (2011)Electrical Impedance Characterization of Bone Fractures in Presence of an Intramedullary Nail., , , , , , , and . BIBE, page 705-708. IEEE, (2020)Stacked-Cascode Current Steering Architecture for Gallium Nitride Variable-Gain LNAs., , , , , , and . LASCAS, page 1-4. IEEE, (2023)