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Disambiguation of "Ashar, Pranav"

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Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks.

, , and . ITC, page 887-896. IEEE Computer Society, (1991)

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Ashar Javed

Pranav Tendulkar

Pranav Oberoi

Mohamed Ashari

Siamak Asharin-Fard

 

Other publications of authors with the same name

Exploiting Retiming in a Guided Simulation Based Validation Methodology., , and . CHARME, volume 1703 of Lecture Notes in Computer Science, page 350-353. Springer, (1999)An Edge-endpoint-based Configurable Hardware Architecture for VLSI Layout Design Rule Checking., , and . VLSI Design, 10 (3): 249-263 (2000)Verification of Embedded Memory Systems using Efficient Memory Modeling., , and . DATE, page 1096-1101. IEEE Computer Society, (2005)Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver., , , , and . DAC, page 747-750. ACM, (2002)Property-specific witness graph generation for guided simulation., , , , , and . DATE, page 799. IEEE Computer Society, (2001)Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs., , , , and . ICCAD, page 286-292. IEEE Computer Society, (2001)Technology Mapping for Lower Power., , and . DAC, page 74-79. ACM Press, (1993)Scheduling Techniques to Enable Power Management., , , and . DAC, page 349-352. ACM Press, (1996)Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability., , , and . DAC, page 194-199. ACM Press, (1998)Fast functional simulation using branching programs., and . ICCAD, page 408-412. IEEE Computer Society / ACM, (1995)