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LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2938-2951 (2020)SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments., , , , , , , , and . DATE, page 1257-1262. IEEE, (2022)A novel in-field TSV repair method for latent faults., , , and . IEICE Electron. Express, 15 (23): 20180873 (2018)Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1752-1756 (2022)A Robust and High-Performance Flip-Flop with Complete Soft-Error Recovery., , , , and . DSA, page 474-476. IEEE, (2023)MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator., , , , , , and . AsianHOST, page 1-6. IEEE, (2022)A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch., , , , , , and . NANOARCH, page 1-6. IEEE, (2021)A SEU Immune Flip-Flop with Low Overhead., , , , and . ML4CS (2), volume 12487 of Lecture Notes in Computer Science, page 56-65. Springer, (2020)A Hybrid DMR Latch to Tolerate MNU Using TDICE and WDICE., , , , , and . ATS, page 121-126. IEEE, (2018)A Test Method for Large-size TSV Considering Resistive Open Fault and Leakage Fault Coexistence., , and . VLSI-DAT, page 1-4. IEEE, (2021)