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Disambiguation of "Zhou, Dajiang"

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An independent bandwidth reduction device for HEVC VLSI video system.

, , , , and . ISCAS, page 609-612. IEEE, (2015)

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Zhou Zhou

Zhou Zhou

Wei Zhou

Yaming Zhou

Xianzhong Zhou

 

Other publications of authors with the same name

Merge mode based fast inter prediction for HEVC., , , and . VCIP, page 1-4. IEEE, (2015)Approximate-DCT-Derived Measurement Matrices with Row-Operation-Based Measurement Compression and its VLSI Architecture for Compressed Sensing., , , and . IEICE Trans. Electron., 101-C (4): 263-272 (2018)An independent bandwidth reduction device for HEVC VLSI video system., , , , and . ISCAS, page 609-612. IEEE, (2015)Interlaced asymmetric search range assignment for bidirectional motion estimation., , and . ICIP, page 1557-1560. IEEE, (2012)An area-efficient 4/8/16/32-point inverse DCT architecture for UHDTV HEVC decoder., , , , and . VCIP, page 197-200. IEEE, (2014)A High Performance HEVC De-Blocking Filter and SAO Architecture for UHDTV Decoder., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 96-A (12): 2612-2622 (2013)CNN-MERP: An FPGA-based memory-efficient reconfigurable processor for forward and backward propagation of convolutional neural networks., , , and . ICCD, page 320-327. IEEE Computer Society, (2016)A Low-Complexity HEVC Intra Prediction Algorithm Based on Level and Mode Filtering., , and . ICME, page 1085-1090. IEEE Computer Society, (2012)A 16-65 cycles/MB H.264/AVC motion compensation architecture for Quad-HD applications., , , and . EUSIPCO, page 729-733. IEEE, (2011)A 1 Gbin/s CABAC encoder for H.264/AVC., , and . EUSIPCO, page 1524-1528. IEEE, (2011)