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A 1.9 mW 250 MHz Bandwidth Continuous-Time ΣΔ Modulator for Ultra-Wideband Applications., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)Current-mode multi-path excess loop delay compensation for GHz sampling CT ΣΔ ADCs., , , , , , and . ISCAS, page 1-4. IEEE, (2017)A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOS., , , , , , , and . ESSCIRC, page 491-494. IEEE, (2021)A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW., , , , , , , , , and . ESSCIRC, page 321-324. IEEE, (2022)An 118dB DR CT IF-to-Baseband ΣΔ Modulator for AM/FM/IBOC Radio Receivers., , , , and . ISSCC, page 151-160. IEEE, (2006)An Inverter-Based Hybrid ΔΣ Modulator., , and . ISSCC, page 492-493. IEEE, (2008)A multi-bit cascaded sigma-delta modulator with an oversampled single-bit DAC., , and . ICECS, page 49-52. IEEE, (2009)Continuous-time Sigma-Delta Modulators for Highly Digitised Receivers., , , , and . ICECS, page 41-45. IEEE, (2006)Effects of packaging and process spread on a mobility-based frequency reference in 0.16-μm CMOS., , , , , and . ESSCIRC, page 511-514. IEEE, (2011)Audio at low and high power., , and . ESSCIRC, page 40-49. IEEE, (2008)