Author of the publication

System level testability analysis using Petri nets.

, , , and . HLDVT, page 112-117. IEEE Computer Society, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Interfaces for mixed-level simulation with sequential elements., , , and . J. Syst. Archit., 47 (2): 87-101 (2001)A Top-Down Design Environment for Developing Pipelined Datapaths., , and . DAC, page 236-241. ACM Press, (1998)Refinement of system-level designs using hybrid modeling., , , , and . ICECCS, page 409-416. IEEE Computer Society, (1995)An undergraduate advanced computer design course using virtual-prototyping., and . MSE, page 62-63. IEEE Computer Society, (1997)A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates., and . MSE, page 27-28. IEEE Computer Society, (2003)Concurrent testing of VLSI circuits using conservative logic., , and . ICCD, page 60-65. IEEE Computer Society, (1990)The Future of Embedded System Design., , , , and . ICCD, page 144-146. IEEE Computer Society, (1992)Special Issue Introduction: The IEEE Computer Society's 60th Anniversary., , , and . Computer, 39 (10): 22-25 (2006)Reliability and safety analysis in medical applications of computer technology., and . CBMS, page 96-100. IEEE, (1988)An analysis of fault partitioning algorithms for fault partitioned ATPG., , and . VTS, page 231-239. IEEE Computer Society, (1996)