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DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs.

P. Reviriego, M. Demirci, J. Tabero, A. Regadío, and J. Maestro. Microelectron. Reliab., (2016)

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Benno Pedrotti

Mario Pedroso

Luicy Pedroza Espinoza

Claudia Pedroni

Francisco Pedrosa Gil

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EMOMA: Exact Match in One Memory Access.S. Pontarelli, P. Reviriego, and M. Mitzenmacher. IEEE Trans. Knowl. Data Eng., 30 (11): 2120-2133 (2018)An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs.A. Ramos, R. Gonzalez-Toral, P. Reviriego, and J. Maestro. IEEE Trans. Computers, 68 (9): 1404-1410 (2019)Efficient Fault-Tolerant Design for Parallel Matched Filters.Z. Gao, M. Zhou, P. Reviriego, and J. Maestro. IEEE Trans. Circuits Syst. II Express Briefs, 65-II (3): 366-370 (2018)Codes for Limited Magnitude Error Correction in Multilevel Cell Memories.S. Liu, P. Reviriego, and F. Lombardi. IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 67-I (5): 1615-1626 (2020)Validation and optimization of TMR protections for circuits in radiation environments.O. Ruano, J. Maestro, and P. Reviriego. DDECS, page 399-400. IEEE Computer Society, (2011)An Experimental Analysis of SEU Sensitiveness on System Knowledge-based Hardening Techniques.O. Ruano, P. Reyes, J. Maestro, L. Sterpone, and P. Reviriego. DDECS, page 261-266. IEEE Computer Society, (2007)Detecting errors in instructions with bloom filters.M. Atamaner, O. Ergin, M. Ottavi, and P. Reviriego. DFT, page 1-4. IEEE Computer Society, (2017)Efficient fault tolerant parallel matrix-vector multiplications.Z. Gao, P. Reviriego, and J. Maestro. IOLTS, page 25-26. IEEE, (2016)Implications of energy efficient Ethernet for hubs and switches.P. Reviriego, J. Maestro, and C. Bleakley. Int. J. Commun. Networks Distributed Syst., 6 (1): 3-11 (2011)Exploiting Asymmetry in eDRAM Errors for Redundancy-Free Error-Tolerant Design.S. Liu, P. Reviriego, J. Guo, J. Han, and F. Lombardi. IEEE Trans. Emerg. Top. Comput., 9 (4): 2064-2075 (2021)

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Disambiguation of "Reviriego, Pedro"

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DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs.

Please choose a person to relate this publication to

Benno Pedrotti

Mario Pedroso

Luicy Pedroza Espinoza

Claudia Pedroni

Francisco Pedrosa Gil

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Reviriego, Pedro"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs.

Please choose a person to relate this publication to

Benno Pedrotti

Mario Pedroso

Luicy Pedroza Espinoza

Claudia Pedroni

Francisco Pedrosa Gil

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
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DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs.