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Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization., and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 291-311. Springer, (2010)Special issue on IEEE/ACM System Level Interconnect Prediction (SLIP) Workshop 2016., and . Integr., (2017)Pulsed-latch-based clock tree migration for dynamic power reduction., , and . ISLPED, page 39-44. IEEE/ACM, (2011)Design-for-reliability and on-the-fly fault tolerance procedure for paper-based digital microfluidic biochips with multiple faults., , , and . Integr., (March 2023)Error Recovery in Cyberphysical Digital Microfluidic Biochips., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (1): 59-72 (2013)Biochemistry Synthesis on a Cyberphysical Digital Microfluidics Platform Under Completion-Time Uncertainties in Fluidic Operations., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (6): 903-916 (2014)Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (1): 327-331 (2023)Reliability-Aware Synthesis With Dynamic Device Mapping and Fluid Routing for Flow-Based Microfluidic Biochips., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (12): 1981-1994 (2016)Optimization of 3D Digital Microfluidic Biochips for the Multiplexed Polymerase Chain Reaction., , and . ACM Trans. Design Autom. Electr. Syst., 21 (2): 25:1-25:27 (2016)Neural Clamping: Joint Input Perturbation and Temperature Scaling for Neural Network Calibration., , and . CoRR, (2022)