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Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study., and . CODES+ISSS, page 1-6. ACM, (2008)Efficient FPGA-based ECDSA Verification Engine for Permissioned Blockchains., , and . ASAP, page 148-155. IEEE, (2022)A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units., , , and . VLSID, page 84-89. IEEE, (2020)Improving Energy Efficiency of Permissioned Blockchains Using FPGAs., and . ICPADS, page 177-184. IEEE, (2022)Fidelity metrics for estimation models., , and . ICCAD, page 1-8. IEEE, (2010)Optimal synthesis of latency and throughput constrained pipelined MPSoCs targeting streaming applications., , , and . CODES+ISSS, page 75-84. ACM, (2010)FALCON: A Framework for HierarchicAL Computation of Metrics for CompONent-Based Parameterized SoCs., , , , and . DAC, page 33:1-33:6. ACM, (2014)RExCache: Rapid exploration of unified last-level cache., , and . ASP-DAC, page 582-587. IEEE, (2013)Optimizing Validation Phase of Hyperledger Fabric., , and . MASCOTS, page 269-275. IEEE Computer Society, (2019)A case study on exploration of last-level cache for energy reduction in DDR3 DRAM., , , and . MECO, page 42-45. IEEE, (2013)