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Disambiguation of "Rao, Muzaffar"

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Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA.

, , and . DSD, page 643-646. IEEE Computer Society, (2014)

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Muzaffar Bashir

Muzaffar Bashir

Muzaffar Bashir

Muzaffar Khan

Muzaffar Bashir

 

Other publications of authors with the same name

Healthcare WSN: Cluster Elections and Selective Forwarding Defense., , and . NGMAST, page 341-346. IEEE, (2015)Real-Time Secure/Unsecure Video Latency Measurement/Analysis with FPGA-Based Bump-in-the-Wire Security., , , , and . Sensors, 19 (13): 2984 (2019)An Efficient High Speed AES Implementation Using Traditional FPGA and LabVIEW FPGA Platforms., , , , and . CyberC, IEEE, (2018)FPGA Based Reconfigurable IPSec AH Core Suitable for IoT Applications., , , , and . CIT/IUCC/DASC/PICom, page 2212-2216. IEEE, (2015)FPGA Based Real Time 'Secure' Body Temperature Monitoring Suitable for WBSN., , , , and . CIT/IUCC/DASC/PICom, page 140-143. IEEE, (2015)Cluster head election and rotation for medical-based wireless sensor networks., , , , and . CoDIT, page 149-154. IEEE, (2017)Bump in the wire (BITW) security solution for a marine ROV remote control application., , , , , , , , and . J. Inf. Secur. Appl., (2018)An efficient implementation of FPGA based high speed IPSec (AH/ESP) core., , , , , and . Int. J. Internet Protoc. Technol., 11 (2): 97-109 (2018)Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA., , and . DSD, page 643-646. IEEE Computer Society, (2014)AES implementation on Xilinx FPGAs suitable for FPGA based WBSNs., , and . ICST, page 773-778. IEEE, (2015)