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Disambiguation of "Jun, Young-Hyun"

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10.4 A 5.8Gb/s adaptive integrating duobinary-based DFE receiver for multi-drop memory interface.

, , , , , , , and . ISSCC, page 1-3. IEEE, (2015)

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Young-Hyun Lee

Young-Hyun Lee

Young-Hyun Sung

Young-Hyun Lee

Young Jun Kim

 

Other publications of authors with the same name

1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture., , , , , , , , , and 5 other author(s). ISSCC, page 128-129. IEEE, (2009)A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 43 (11): 2381-2389 (2008)A slew rate-controlled output driver having a constant transition time over the variations of process, voltage and temperature., , , , , and . CICC, page 231-234. IEEE, (2005)A crosstalk-and-ISI equalizing receiver in 2-drop single-ended SSTL memory channel., , , , , , , and . CICC, page 1-4. IEEE, (2010)Wafer-Level Characterization of Probecards using NAC Probing., , , , and . ITC, page 1-9. IEEE Computer Society, (2008)A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW., , , , , , , , , and 25 other author(s). ISSCC, page 500-502. IEEE, (2011)A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques., , , , , , , , , and 16 other author(s). ISSCC, page 278-279. IEEE, (2008)An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion., , , , , , , , , and 19 other author(s). ISSCC, page 492-617. IEEE, (2007)A temperature-stabilized voltage reference utilizing MOS body effect., , and . APCCAS, page 792-795. IEEE, (2010)Line inversion-based mobile TFT-LCD driver IC with accurate quadruple-gamma-curve correction., , , , , , and . A-SSCC, page 341-344. IEEE, (2011)