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Post-training Piecewise Linear Quantization for Deep Neural Networks.

, , , , , and . ECCV (2), volume 12347 of Lecture Notes in Computer Science, page 69-86. Springer, (2020)

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Post-training Piecewise Linear Quantization for Deep Neural Networks., , , , , and . ECCV (2), volume 12347 of Lecture Notes in Computer Science, page 69-86. Springer, (2020)Griffin: Rethinking Sparse Optimization for Deep Learning Architectures., , , , , and . HPCA, page 861-875. IEEE, (2022)Design Space Exploration of Sparse Accelerators for Deep Neural Networks., , , , , and . CoRR, (2021)FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator., , , , , , , , , and 1 other author(s). ISCA, page 265-278. IEEE, (2021)Understanding and alleviating intra-die and intra-DIMM parameter variation in the memory system., , and . ICCD, page 217-224. IEEE Computer Society, (2016)A morphable phase change memory architecture considering frequent zero values., , , and . ICCD, page 373-380. IEEE Computer Society, (2011)ρ: Relaxed Hierarchical ORAM., , , and . ASPLOS, page 659-671. ACM, (2019)INXS: Bridging the throughput and energy gap for spiking neural networks., , and . IJCNN, page 2451-2459. IEEE, (2017)Application-aware deadlock-free oblivious routing based on extended turn-model., , , and . ICCAD, page 213-218. IEEE Computer Society, (2011)Using Partial Tag Comparison in Low-Power Snoop-Based Chip Multiprocessors., , and . ISCA Workshops, volume 6161 of Lecture Notes in Computer Science, page 211-221. Springer, (2010)