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Temporal logic replication for dynamically reconfigurable FPGA partitioning., и . ISPD, стр. 190-195. ACM, (2002)CUGR: Detailed-Routability-Driven 3D Global Routing with Probabilistic Resource Model., , , и . DAC, стр. 1-6. IEEE, (2020)Twin binary sequences: a nonredundant representation for general nonslicing floorplan., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (4): 457-469 (2003)Exploring Rule-Free Layout Decomposition via Deep Reinforcement Learning., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (9): 3067-3077 (сентября 2023)Incorporating cut redistribution with mask assignment to enable 1D gridded design., , и . ICCAD, стр. 48. ACM, (2016)SPARK: A Scalable Partitioning and Routing Framework for Multi-FPGA Systems., , и . ACM Great Lakes Symposium on VLSI, стр. 593-598. ACM, (2023)Xplace: an extremely fast and extensible global placement framework., , , и . DAC, стр. 1309-1314. ACM, (2022)Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method., , , , , , , , и . ASP-DAC, стр. 885-891. ACM, (2021)Accelerating Physical Design from 1 to N.. ISPD, стр. 227. ACM, (2024)Lagrangian Relaxation-Based Time-Division Multiplexing Optimization for Multi-FPGA Systems., и . ICCAD, стр. 1-8. ACM, (2019)