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Novel High-Performance and Cost Effective Soft Error Hardened Flip-Flop Design for Nanoscale CMOS Technology., , , and . ASICON, page 1-4. IEEE, (2019)Versatile and Efficient Techniques for Speeding-Up Circuit Level Simulated Fault-Injection Campaigns., , and . PRDC, page 17-23. IEEE Computer Society, (2008)A mixed-signal simulator for VHDL-AMS., , , , , and . ASP-DAC, page 287-292. ACM, (2001)New SEC-DED-DAEC codes for multiple bit upsets mitigation in memory., , and . VLSI-SoC, page 254-259. IEEE, (2011)Siamese attentional keypoint network for high performance visual tracking., , , , , and . Knowl. Based Syst., (2020)Low-cost resilient radiation hardened flip-flop design., , , , and . ASICON, page 222-225. IEEE, (2017)Siamese Attentional Keypoint Network for High Performance Visual Tracking., , , , and . CoRR, (2019)A 13T radiation-hardened memory cell for low-voltage operation and ultra-low power space applications., , , , , and . ISQED, page 161-165. IEEE, (2017)Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells., , , , , and . DFT, page 1-4. IEEE, (2019)Efficient Two-Dimensional Error Codes for Multiple Bit Upsets Mitigation in Memory., , , and . DFT, page 129-135. IEEE Computer Society, (2010)