Author of the publication

A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems.

, , , , and . DATE, page 1447-1450. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Utilizing NVDIMM to alleviate the I/O performance gap for big data workloads.. VLSI-DAT, page 1. IEEE, (2017)General loop fusion technique for nested loops considering timing and code size., , , and . CASES, page 190-201. ACM, (2004)Balloonfish: Utilizing morphable resistive memory in mobile virtualization., , , , , and . ASP-DAC, page 322-327. IEEE, (2015)TLC-FTL: Workload-Aware Flash Translation Layer for TLC/SLC Dual-Mode Flash Memory in Embedded Systems., , , , and . HPCC/CSS/ICESS, page 831-834. IEEE, (2015)Which is the best PID variant for pneumatic soft robots an experimental study., , , , and . IEEE CAA J. Autom. Sinica, 7 (2): 451-460 (2020)RNFTL: a reuse-aware NAND flash translation layer for flash memory., , , , , and . LCTES, page 163-172. ACM, (2010)Cymo: A Storage Model with Query-Aware Indexing for Spatio-Temporal Big Data., and . ICDCS, page 122-132. IEEE, (2022)CNN Acceleration with Joint Optimization of Practical PIM and GPU on Embedded Devices., , and . ICCD, page 377-384. IEEE, (2022)Revisiting swapping in mobile systems with SwapBench., , , , , , , and . Future Gener. Comput. Syst., (2017)Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs., , , , , and . EUC, volume 3824 of Lecture Notes in Computer Science, page 121-130. Springer, (2005)