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Disambiguation of "Rolandi, Pier Luigi"

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Yield prediction for 3D capacitive interconnections.

, , , , , , , and . ICCAD, page 809-814. ACM, (2006)

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Waltraud Pier

Waltraud Pier

Arnold Pier

Luigi Sportelli

Luigi Busarello

 

Other publications of authors with the same name

Analog sense amplifiers for high density NOR flash memories., , , , , , and . CICC, page 247-250. IEEE, (1999)A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories., , , , and . ISCAS, page 2411-2414. IEEE, (2007)A high compliance CMOS current source for low voltage applications., , , and . ISCAS (1), page 425-428. IEEE, (2003)A 64 min single-chip voice recorder/player using embedded 4 bit/cell flash memory., , , , , and . CICC, page 219-222. IEEE, (2000)A 1.2-to-8V Charge-Pump with Improved Power Efficiency for Non-Volatille Memories., , , , and . ISSCC, page 522-619. IEEE, (2007)3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities., , , , , , , and . ISSCC, page 356-608. IEEE, (2007)A dynamically adaptive DSP for heterogeneous reconfigurable platforms., , , , , , , , and . DATE, page 9-14. EDA Consortium, San Jose, CA, USA, (2007)Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators., , , , , , , , , and 2 other author(s). IRPS, page 1-4. IEEE, (2024)Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors., , , , , , , and . ISLPD, page 203-208. ACM, (1995)System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface., , , , , , and . CICC, page 463-466. IEEE, (2009)