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ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions., , и . MICRO, стр. 126-138. ACM, (2019)Enabling portable energy efficiency with memory accelerated library., , , , , , и . MICRO, стр. 750-761. ACM, (2015)MobileDets: Searching for Object Detection Architectures for Mobile Accelerators., , , , , , , , и . CoRR, (2020)Data reorganization in memory using 3D-stacked DRAM., , и . ISCA, стр. 131-143. ACM, (2015)Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes., , , и . FCCM, стр. 188-191. IEEE Computer Society, (2012)HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM., , и . HPEC, стр. 1-6. IEEE, (2014)Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only)., , , и . FPGA, стр. 271. ACM, (2012)FFTS with near-optimal memory access through block data layouts., , и . ICASSP, стр. 3898-3902. IEEE, (2014)Searching for Efficient Neural Architectures for On-Device ML on Edge TPUs., , , , , , , , и . CVPR Workshops, стр. 2666-2675. IEEE, (2022)Understanding the design space of DRAM-optimized hardware FFT accelerators., , и . ASAP, стр. 248-255. IEEE Computer Society, (2014)