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Disambiguation of "Franco, Denis Teixeira"

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Exploring BDDs to reduce test pattern set.

, , and . LATS, page 1-4. IEEE, (2017)

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Renata Teixeira

José Teixeira

Andreas Teixeira

Jeane Teixeira

Jaap Denissen

 

Other publications of authors with the same name

An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults., , , and . VLSI-SoC (Selected Papers), volume 586 of IFIP Advances in Information and Communication Technology, page 69-88. Springer, (2019)Reliability evaluation of circuits designed in multi- and single-stage versions., , , , , , and . LASCAS, page 1-4. IEEE, (2018)On evaluating the signal reliability of self-checking arithmetic circuits., , , and . SBCCI, page 109-114. ACM, (2010)Non-Linear Components for Mixed Circuits Analog Front-End., , , , and . DATE, page 544-549. IEEE Computer Society / ACM, (2000)On the output events in concurrent error detection schemes., , , and . ICECS, page 978-981. IEEE, (2008)A system based on interval fuzzy approach to predict the appearance of pests in agriculture., , , and . IFSA/NAFIPS, page 1262-1267. IEEE, (2013)FPGA Architecture Comparison for Non-Conventional Signal Processing., and . IJCNN (2), page 55-58. IEEE Computer Society, (2000)0-7695-0619-4.Exploring BDDs to reduce test pattern set., , and . LATS, page 1-4. IEEE, (2017)Methods and Metrics for Reliability Assessment., , , and . Fault-Tolerant Distributed Algorithms on VLSI Chips, volume 08371 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2008)Inserting permanent fault input dependence on PTM to improve robustness evaluation., , , , , and . SBCCI, page 1-6. IEEE, (2016)