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Dynamic and Speculative Polyhedral Parallelization Using Compiler-Generated Skeletons

, , , , and . Int. J. Parallel Program., 42 (4): 529--545 (August 2014)

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Efficient thread/page/parallelism autotuning for NUMA systems., , and . ICS, page 342-353. ACM, (2019)Preface ASAP 2023., , , and . ASAP, page xi. IEEE, (2023)Alternate Path μ-op Cache Prefetching., , , and . ISCA, page 1230-1245. IEEE, (2024)Exploring Instruction Fusion Opportunities in General Purpose Processors., , , and . MICRO, page 199-212. IEEE, (2022)Efficient invisible speculative execution through selective delay and value prediction., , , , and . ISCA, page 723-735. ACM, (2019)Dynamic and Speculative Polyhedral Parallelization Using Compiler-Generated Skeletons, , , , and . Int. J. Parallel Program., 42 (4): 529--545 (August 2014)CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions., , , , and . PACT, page 1-13. IEEE, (2023)Composite Instruction Prefetching., , , , , , and . ICCD, page 471-478. IEEE, (2022)A Cost-Effective Entangling Prefetcher for Instructions., and . ISCA, page 99-111. IEEE, (2021)Clearing the Shadows: Recovering Lost Performance for Invisible Speculative Execution through HW/SW Co-Design., , , , , and . PACT, page 241-254. ACM, (2020)