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Disambiguation of "Biagioni, Andrea"

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Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface.

, , , , , , , , , and . ReConFig, page 1-6. IEEE, (2013)

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Andrea Witzenrath

Risikofaktoren für abdominelle Komplikationen nach kardiopulmonalem Bypass. Uni Erlangen-Nürnberg, (2009)

Andrea Rottach

Analysis of the cell cycle dependent dynamics of Dnmt1 and Np95 in living cells. Uni München, (2009)

Andrea Hruby

Die MAPKKK Bck1p des Zellwand-Integritätssignalwegs in der Bäckerhefe Saccharomyces cerevisiae. Uni Münster, (2009)

Michaela Andrea Fingas

Resultate nach radikaler Prostatektomie bei Patienten mit einem Prostatakarzinom Gleason 7-10. Uni Marburg, (2009)

Andrea Weckesser

 

Other publications of authors with the same name

TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale., , , , , , , , , and 41 other author(s). DSD, page 286-294. IEEE, (2021)Large Scale Low Power Computing System - Status of Network Design in ExaNeSt and EuroExa Projects., , , , , , , , , and 3 other author(s). PARCO, volume 32 of Advances in Parallel Computing, page 750-759. IOS Press, (2017)The Next Generation of Exascale-Class Systems: The ExaNeSt Project., , , , , , , , , and 8 other author(s). DSD, page 510-515. IEEE Computer Society, (2017)Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodity cluster., , , , , , , , , and . CoRR, (2013)Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface., , , , , , , , , and . ReConFig, page 1-6. IEEE, (2013)Real-Time Cortical Simulations: Energy and Interconnect Scaling on Distributed Systems., , , , , , , , , and 4 other author(s). PDP, page 283-290. IEEE, (2019)The INFN COSA Project: Low-Power Computing and Storage., , , , , , , , , and 9 other author(s). PARCO, volume 32 of Advances in Parallel Computing, page 770-779. IOS Press, (2017)The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems., , , , , , , , , and 17 other author(s). DSD, page 60-67. IEEE Computer Society, (2016)GPU Peer-to-Peer Techniques Applied to a Cluster Interconnect., , , , , , , , , and 4 other author(s). IPDPS Workshops, page 806-815. IEEE, (2013)Gaussian and Exponential Lateral Connectivity on Distributed Spiking Neural Network Simulation., , , , , , , , , and 3 other author(s). PDP, page 658-665. IEEE Computer Society, (2018)