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VLSI Architectures for Computing Multiplications and Inverses in GF(2m).

, , , , , and . IEEE Trans. Computers, 34 (8): 709-717 (1985)

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Filterless approximations of K th order to coherent detection., and . IRE Trans. Inf. Theory, 8 (3): 196-199 (1962)The use of finite fields to compute convolutions., and . IEEE Trans. Inf. Theory, 21 (2): 208-213 (1975)The fast decoding of Reed-Solomon codes using Fermat transforms (Corresp.)., , and . IEEE Trans. Inf. Theory, 24 (4): 497-499 (1978)Space-time adaptive reduced-rank multistage Wiener filtering for asynchronous DS-CDMA., and . IEEE Trans. Signal Process., 52 (7): 1862-1877 (2004)Automatic target detection and recognition in multiband imagery: a unified ML detection and estimation approach., , , , and . IEEE Trans. Image Process., 6 (1): 143-156 (1997)Adaptive multiple-band CFAR detection of an optical pattern with unknown spectral distribution., and . IEEE Trans. Acoust. Speech Signal Process., 38 (10): 1760-1770 (1990)VLSI implementation of GSC architecture with a new ripple carry adder., , , , and . ICCD, page 520-523. IEEE, (1988)The use of neural nets to combine equalization with decoding., and . ICASSP (1), page 469-472. IEEE Computer Society, (1993)An Integral Microcontroller Architecture Designed by Using the Register Transfer Language for VLSI Chips., , and . ICPP (1), page 619-620. Pennsylvania State University Press, (1990)A single chip VLSI Reed-Solomon decoder., , , , and . ICASSP, page 2151-2154. IEEE, (1986)