A power-efficient FPGA accelerator: Systolic array with cache-coherent interface for pair-HMM algorithm.
M. Ito, and M. Ohara. COOL Chips, page 1-3. IEEE Computer Society, (2016)
Please choose a person to relate this publication to
To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.
You can add a new person with the name "Ohara, Moriyoshi", or you can connect "Ohara, Moriyoshi" with a person entry that is so far only been referred to by another name (such as a former name or an alias name).
Your choice of the person associated to the publication can be saved in our system, so that no other have to make this choice again. Do you want to save your choice?
Disambiguation
The disambiguation is part of the BibSonomy genealogy project and is used to link unassigned publications to an existing person. You see the referenced publication of the author "Ohara, Moriyoshi", a list of already existing persons with the same author-name, and if available, other publications associated to them. Now you have the option to assign this publication to a person or create a new one.