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Design and optimization of a high PSRR CMOS bandgap voltage reference., , , and . ISCAS (1), page 45-48. IEEE, (2004)A compact, low power, fully integrated clock frequency doubler., , and . ICECS, page 563-566. IEEE, (2003)A high dynamic range CMOS variable gain filter for ADSL., and . ISCAS (4), page 257-260. IEEE, (2002)A technique to suppress tail current flicker noise in CMOS LC VCOs., , , and . ISCAS, IEEE, (2006)A Tree-Structured LoRa Network for Energy Efficiency., , and . IEEE Internet Things J., 8 (7): 6002-6011 (2021)A high dynamic-range, self-tuned Gm-C filter for video-range applications., and . ISCAS (2), page 660-663. IEEE, (1999)A 1.5 v high-speed class AB operational amplifier for high-resolution high-speed pipelined A/D converters., , , and . ISCAS (1), page 273-276. IEEE, (2003)A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearity., , , and . ISCAS (1), page 349-352. IEEE, (2004)A fractional delay-locked loop for on chip clock generation applications., , and . ASP-DAC, page 1300-1309. ACM Press, (2005)A low-power subscriber line interface circuit in a high-voltage CMOS technology., , and . ISCAS (5), page 409-412. IEEE, (2002)