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SkipCache: application aware cache management for chip multi-processors.

, , and . IET Comput. Digit. Tech., 9 (6): 293-299 (2015)

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SAMO: store aware memory optimizations., , and . Conf. Computing Frontiers, page 33:1-33:10. ACM, (2014)Minimum Cost Loop Nests for Contraction of a Sparse Tensor with a Tensor Network., and . SPAA, page 169-181. ACM, (2024)Motif Prediction with Graph Neural Networks., , , , , , , , , and 1 other author(s). CoRR, (2021)Process Variation Aware Issue Queue Design., and . DATE, page 1438-1443. ACM, (2008)Motif Prediction with Graph Neural Networks., , , , , , , , , and 1 other author(s). KDD, page 35-45. ACM, (2022)Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core Processors., , , and . ICCD, page 239-246. IEEE, (2020)Parallel Minimum Spanning Forest Computation using Sparse Matrix Kernels., , and . PPSC, page 72-83. SIAM, (2022)High-Performance and Programmable Attentional Graph Neural Networks with Global Tensor Formulations., , , , , , , , , and 8 other author(s). SC, page 66:1-66:16. ACM, (2023)SkipCache: application aware cache management for chip multi-processors., , and . IET Comput. Digit. Tech., 9 (6): 293-299 (2015)Optimizing Distributed Tensor Contractions Using Node-Aware Processor Grids., , , , and . Euro-Par, volume 14100 of Lecture Notes in Computer Science, page 710-724. Springer, (2023)